lithography

May 1, 2010

Using DFM for competitive advantage

The article offers a case study of the DFM planning and methodology applied during a shrink of Cambridge Silicon Radio's UF6000 system-on-chip from the 130nm to 65nm.
Article  |  Topics: EDA - DFM  |  Tags: , , , , , ,   |  Organizations: ,
May 1, 2010

Manufacturing a profit

DFM is essential to differentiating your products in the market, says Luigi Capodieci
September 1, 2009

System level DFM at 22nm

The article provides an overview of one common theme in the papers presented at a special session of the 2009 Design Automation Conference, Dawn of the 22nm Design Era. As such, we would recommend that readers wishing to access still more detail on this topic (in particular, on device structures for 22nm and project management […]

Article  |  Topics: EDA - DFM  |  Tags: , , ,
June 1, 2009

Computational scaling: implications for design

The article presents the context for the use of computation scaling (CS) to eke out more from existing lithography tools until next-generation techniques are finally introduced. It discusses the critical elements in the CS ecosystem developed by IBM and partners to overcome roadblocks to optical scaling that demand the use of non-traditional techniques for the […]

Article  |  Topics: EDA - DFM  |  Tags: , , ,
June 1, 2008

Migration of the Cell Broadband Engine to 45nm SOI

The paper describes some of the main challenges in the latest process shrink for the Cell Broadband Engine, developed jointly by IBM, Sony and Toshiba. The authors show how the move from a 65nm to a 45nm SOI process was achieved by concentrating on four primary goals: automating the migration; setting a 30% power reduction […]

Article  |  Topics: EDA - DFM  |  Tags: , , ,

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