CEA-Leti adds partners to FD-SOI low-power design centre
Silicon Impulse program adds partners to ease industrialisation of ultra-low power IC designs based on FD-SOI processes
EDA
DTCO tool aims to squeeze more out of older processes
Gold Standard Simulations (GSS) has launched a tool intended to help fabless chipmakers squeeze more out of existing processes rather than accept the risk and expense of moving to more advanced, finFET-based processes.
Synopsys speeds automotive SoC qualification with IP launch
Synopsys develops portfolio of ASIL B ready IP, and invests in AEC-Q100 testing and TS 16949 quality management, to ease automotive SoC qualification.
Synopsys to acquire Atrenta
Atrenta's SpyGlass line and others to be absorbed in Verification Continuum and Galaxy as part of EDA's latest major consolidation.
DAC 2015 forecast: Cloudy with a chance of Spice installs
Spice regressions, library characterisation and yield analysis are all being promoted as suitable for running on the cloud
IBM plans to disrupt EDA market with cloud offering
IBM to offer end-to-end IC design flow on its own infrastructure in PAYG EDA model.
Speedy software creation to show off custom-tool possibilities
Invionics will be using its software environment to create a custom tool within just two days at the 52nd DAC.
Intelligent software testing conference coming up online – and in Bristol
Online conference discusses software testing for avionics and security, code coverage, agile methodologies, behaviour-driven development and more
DAC2015: Real Intent at the Design Automation Conference
Real Intent has lined up a mixture of technology and speed tests for its presence on Booth #1422 at the Design Automation Conference this year.
DAC 2015: Synopsys at the Design Automation Conference
Synopsys will be emphasising its 'silicon to software' offering at the 2015 Design Automation Conference.