Avago and Broadcom: integration of another kind?
Last week’s announcement by Avago that it would buy Broadcom looks to be only partly about bulk. The merger could help drive SIP and 3DIC integration.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
Ten myths of formal verification debunked
Senior verification expert at Imagination Technologies debunks ten myths surrounding the use of formal techniques in SoC design and verification
Heading to DAC? Why not head to the Love IP Party too
This year’s Heart of Technology philanthropic event on Monday June 8 promises craft beers, music, a pool tournament and more, all supporting a great cause.
Mentor zooms in on power peaks with emulator interface
Mentor Graphics has released a programming interface to its Veloce emulators intended to support faster and more accurate power estimation.
Intersil buck converter aims to cut out intermediate power bus
Intersil is aiming to remove the intermediate converters from the power buses of industrial systems using a buck converter that can take a voltage of 48V and provide power rails down to 1V.
Shape a major choice for sub-10nm nanowire FETs
TCAD specialist GSS says nanowire transistors look practical down to 5nm but that designers need to carefully explore how the wires are shaped as quantum-confinement effects take hold
Cadence updates Allegro with PCB production and routing tools
Cadence has launched the 16.6 release of its Allegro PCB-design portfolio, adding modules for manufacturing documentation and design-rule preparation aids.
OneSpin uses app-store approach to open up formal verification
Formal-verification specialist OneSpin is setting up its own equivalent of an app store, building on top of a formal engine the company now licenses to other companies.
Agnisys automates register checks
Agnisys is adding automated verification of SoC register maps to its IDesignSpec tool for defining and specifying registers and their behaviours, deploying both a dynamic and a formal version.
Real Intent tackles CDC at the physical level
Meridian Physical CDC targets post-synthesis gate-level clock domain crossing issues, including unintended glitches and functional failures.