Intersil buck converter aims to cut out intermediate power bus

By Chris Edwards |  No Comments  |  Posted: May 26, 2015
Topics/Categories: Blog - PCB  |  Tags: , , , ,  | Organizations:

Intersil is aiming to remove the intermediate converters from the power buses of industrial, medical and communications systems with the introduction of a buck converter that can take a voltage of 48V and provide power rails down to the 1V level at the point of load.

The drive for higher efficiency power distribution in servers has led companies such as IBM to employ DC power buses running at more than 40V to power blades directly, instead of using 12V or 24V distribution to the computer devices. By shifting the bus voltage higher, companies plan to reduce distribution losses through the rack as well as the losses incurred by additional conversion stages. But the gradually reducing core voltage levels of advanced CMOS devices mean the buck controllers they use need to cope with very high Vin/Vout ratios.

Rather than focus on data center designs, Intersil has chosen to aim at industrial designers who want to take advantage of similar efficiency savings, launching its first device for 48V-to-1V conversion, the ISL8117.

Efficiency curve of the ISL8117 for different input voltages

Image Efficiency curve of the ISL8117 for different input voltages

Mark Downing, senior vice president for infrastructure and industrial power products at Intersil, said: “At our data-center customers, there are dedicated power teams handling these designs. But in industrial systems, you often have the situation where the same designer dealing with the system is also expected to handle the power supply. They are looking for ease of use but want to eliminate that intermediate-stage conversion.

“What’s held it back has been the ability to support 48V down to point of load with tight regulation. Up to today, we’ve seen devices that get from 48V to 3.3V but nothing below 3.3V. A 40ns minimum on-time allows us to do that 48V-to-1V conversion,” Downing added.

Because of the potentially extremely short on-times, the PWM controller inside the ISL8117 uses valley current mode sampling rather than peak current to determine the switching points. “We Sample during the PWM off-time. The challenge with peak-current mode is that the upper FET can be pretty noisy [when on]. As you shrink the on-time the signal from that may not have settled out, so you can’t get an accurate conversion from it,” Downing explained.

Running at a frequency of up to 2MHz, the buck controller works with a pair of external FETs to support output currents suitable for midrange FPGAs and industrial microcontrollers and processors. “Some advanced core-logic devices are now drawing 120A. You need multiphase or that – typically six phases – which is a different beast really. But for other rails on those devices or the smaller FPGAs, this can supply the core,” Downing said.

The converter design for which the controller is designed is non-isolated. As some of the isolation needed in industrial and medical systems would often be found in the intermediate bus converter, some digital isolation may be needed at the point of load or that the design use a reasonably well-regulated front-end converter generating the 48V, 36V or 24V bus voltage. The device can cope with input voltage excursions out to 60V to handle situations such as battery backup where the load demand suddenly drops.

Comments are closed.


Synopsys Cadence Design Systems Siemens EDA
View All Sponsors