Sub-10nm finFETs to feature at IEDM
Intel and GlobalFoundries will talk about their post-14nm finFET-based processes at December’s IEDM.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
Arm TechCon 2017 preview: Synopsys
Synopsys’ line-up at next week’s ARM TechCon includes joint presentations with Huawei and Nvidia.
Arm TechCon 2017 preview: Mentor
Mentor will present seven papers during the ARMTech Con and a dedicated session, and exhibit at Booth #606.
Accellera updates SystemC library
Accellera has released a maintenance update to the SystemC core language library that addresses a number of issues that users have reported over the past three years.
VLSI Symposia 2018 looks to machine learning
Machine learning is among the focus topics at next year’s Symposia on VLSI Technology & Circuits in Honolulu, which has issued its call for papers.
5G and automotive provide applications focus for DVCon Europe
The massive complexity of 5G and automotive systems and the need for advanced verification techniques set the scene for DVCon Europe this year.
GlobalFoundries adds 12nm finFET process
GlobalFoundries intends to offer a 12nm FinFET process as a stepping stone from its 14nm process.
MCU benchmark homes in on peripheral power
EEMBC has released a benchmark and initial results that analyze peripheral performance on microcontrollers.
Group to build CCIX accelerator test chip
ARM, Xilinx, Cadence Design Systems, and TSMC have agreed to produce a test chip for the CCIX project.
Codasip adds IoT core to RISC-V line
Codasip has added a processor core aimed at low-energy IoT nodes to its growing portfolio of customizable designs based on the RISC-V architecture.