IEDM 2021 publishes course schedule
Aiming for a primarily physical event in the fall, organisers of the 2021 IEDM have published the tutorial and short-core schedule.
Aiming for a primarily physical event in the fall, organisers of the 2021 IEDM have published the tutorial and short-core schedule.
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
The need for the electrical and mechanical design domains to inform one another in more detail is recognized, but how do you do it?
DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
DAC and the RISC-V Summit will colocate at Moscone West in December, along with Semicon West.
A Siemens white paper describes a way of automatically deriving information from 2.5D/3DIC designs to streamline latchup design-rules verification.
STMicroelectronics has made its first silicon carbide wafers that can be run on a 200mm line.
A detailed technical overview of formal verification within the context of the DO-254 (ED-80) standard is now available to download.
Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.
Arm and flexible-electronics specialist PragmatIC have demonstrated a 32bit processor implemented on a plastic substrate.