Rethought analog design focuses on event-driven simulation

By Chris Edwards |  No Comments  |  Posted: June 12, 2012
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No-one in their right mind expects to be welcomed with open arms when they tell analog designers they should be using digital techniques to design their circuits, as Tom Beckley, senior vice president of R&D for custom ICs at Cadence Design Systems, remarked in his keynote at CDNLive EMEA in May. And Professor Mark Horowitz of Stanford University was under no illusions about that when presenting the IEEE CEDA talk at the Design Automation Conference (DAC) last week. So much so that he challenged the audience to find holes in the approach he and his team have been developing over the past few years to rethink analog design and bring the advantages of digital automation techniques to the field – at least for the Big-D, Little-A designs that are proving a stumbling block to integration at the moment.

Horowitz laid out the advantages that digital designers have: “They have ways to evaluate designs. They have electrical rule checkers that allow you to reuse components. The result is that it is not difficult to take one design to a new process technology. Mixed signal is not like that at all.

“If I give you an analogue cell in your design, the question: is would you use it? The answer is no frickin’ way. But a digital cell? Yes,” said Horowitz.

The core of the problem is that analog designers don’t have electrical rule checkers that separate design intent from implementation. “My claim is that to make analog design more like digital design we need to create all the digital checks for all the things we create,” Horowitz said.

Analog archive

The key problem is one of assumptions. Analog designers check their circuits all the time: using Spice. Their tests contain implicit assumptions about the operating conditions under which the circuit will functions, such as input range and common-mode voltage. To make a design reusable, those assumptions need to be made explicit and captured in a testbench.

“To build a reusable analog cell you ned to record or archive all the testbenches and assertions,” said Horowitz. One part of that process is to provide a cookbook of ready-made circuits and tests. The Stanford contribution to that is an online repository called CircuitBook. “There is no automation in this per se but CircuitBook creates a framework for storing and testing the circuit designs,” said Horowitz.

“The browser is organized by cells. The tests are associated not with circuits but with the interfaces those circuits have. You can build a spec sheet from the tests. The most important aspect of CircuitBook is the way that the tests are organized. We have a test browser. All tests are divided into a number of parts and subdivided by techniques they do, such as the kind of input sources used.

There is a problem, said Horowitz: “The problem right now is that there is nothing in CircuitBook.” There is a framework and tree structure to hold the circuits – there just aren’t any circuits yet.

“But even if I do this I haven’t changed the level of abstraction. I’m still doing Spice. Isn’t there something more we can do?” Horowitz asked.

As well as supplying electrical rule checkers, Horowitz said digital tools have successfully leveraged abstractions, all the way from the Boolean logic abstraction through synchronous design to fault models and formal equivalence checking.

Abstraction mismatch

“You don’t get any digital designer wanting a faster Spice. Analog designers just want faster Spice. But I assure you no matter how fast you guys make it, it will never be fast enough. We need to figure out a way of abstracting analog circuits. The key is to generate an analog circuit abstraction.”

“I am going to make the huge leap and say that the right abstraction is a linear abstraction or linear model,” Horowitz claimed, adding: “Before you jump all over me I have done a lot of circuit designs.

“You generally don’t have to look very hard to see what the curve is. It doesn’t take a very long time to explore all the space. I’m going to conjecture that all systems have this linear intent. And if the circuit is roughly linear then we will have an easier time of building models. If I can model the system as a linear system, the vectors are a product of the input times a matrix of transfer functions. Of course, analog systems are not really linear but digital circuits are not really boolean either.

“I have been giving this talk to a couple of different places. I have been challenging people to find a circuit that doesn’t have some linear relationship. They haven’t, yet.”

In a design where analog dominates and the digital section is relatively small, there is no real need to derive a linear model of an analog circuit: you might as well use Spice. but in the environment of an SoC, even fast-Spice represents a major bottleneck.

“I have hung out with enough digital designers to know that they are not going to Spice simulation. It will slow things down too much…This means we need a functional model of the system. In order to do that we will have to change how we do mixed-signal design,” said Horowitz. “I don’t believe in SystemVerilog-type models. It has to be very efficient. And we have to keep it event-driven.

Event-driven approach

“The first problem when representing analog signals in digital simulators is that simulators are event-driven,” said Horowitz. To make it easier to represent signal changes over time, the representation is not a simple ‘wreal’ real-number value that changes according to a function. Instead, the model calculate a piecewise linear waveform from a table of entries that contains value and its derivative at that point.

“You realise at this point there is a problem. Let’s say I add a first-order pole response. This has terrible consequences. If every time an input comes in it generates an output that is fed back things keep running around even though nothing is really changing. So you have to be able to filter out events,” said Horowitz, which he adds takes some skill when it comes to writing modelling code.

“We are starting to write Verilog models and they tend to be efficient: they run reasonably fast with just a few events per cycle. [But] I was amazed at how difficult it is for people to write these models. When students write them they do it in 12 different wrong ways. We need a better methodology of how to do this.”

To develop the linear matrix that controls the outputs the key is to develop tests that exercise the model over its input parameters, including factors such as power-supply changes. “The first thing we do is generate test vectors is to assign every port a type, such as input, output, control input and so on. Then randomly choose input vectors using assertions and perform linear regression. You then check statistics to see if it’s linear enough. If not, it’s time to go back to the designers and say ‘help me out’.

“You tear circuits into the smallest functional blocks, which is what you do in digital simulation anyway.”

Staying in sync

People have been using models for years for the early stages of design but they rarely make it all the way to implementation: “We know what happens with mixed-signal designs. The Matlab model gets stale. The only way to deal with this is to keep them in sync. You have to run regressions and run them every day, every week. Therefore, the process has to be automated.”

Horowitz summarised: “Analog designs are clearly not linear. But the linear model is a good abstraction: it moves us to a higher level. We can model most circuits this way. An abstraction makes it possible to formally define and analyse a model. And formally define fault coverage. It’s so compelling I don’t know why people aren’t already using it.”

Horowitz stressed that the models are not aimed at synthesis – one of those analog technologies that is still ‘out there’: “This is about making sure that I didn’t screw the design up. And I want to make sure that if someone does, they now have a check for that so the next person doesn’t do that.”

During the Q&A session, Professor Steven Levitan of the University of Pittsburgh came up with one system where linear models may not work: the models of spiking neural networks. Horowitz responded: “Things we don’t understand I don’t know whether we can develop these models. Things we do understand pretty well I think we can build linear models.”

It’s worth noting that brain models have, in the past, provided strange results when analyzed from the perspective of electrical circuits. The Hodgkin-Huxley model of action potentials in neurons, for example, implies the existence of a massive inductance when modelled assuming traditional electrical behavior, Professor Leon Chua of the University of California at Berkeley pointed out at DATE earlier this year. A memristor-based model does not result in the use of impossible inductance values.

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