Texas Instruments had good news for teams that want to assemble 3DIC stacks using thru-silicon vias (TSVs). The stress induced by the copper TSVs is not as bad as many feared for nanometer-scale transistors.
MEMS relay-based devices offer the ultimate in subthreshold leakage: they don't have any. Design and technology advances are promising to overcome problems with reliability, design and speed, according to Tsu-Jae King Liu of UC Berkeley.
You want finFETs with different threshold voltages on the same SoC? Forget what the FD-SOI guys tell you: it's possible. At least with a certain amount of performance loss, say IBM and GlobalFoundries.
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