In his opening keynote at the VLSI Technology Symposium on Tuesday, Intel director of components research Mike Mayberry provided four ways to look into what is from today’s perspective a very foggy future.
Although he said he was effectively breaking Intel rules by giving a public speech that didn’t mention Moore’s Law (other than saying he wasn’t going to mention it any more), the speech reflected the way in which the world’s largest chipmaker is likely to change its view from tick-tock to doing what it takes. Or put another way, the future could be about the fastest, smallest transistors anyone can make but, by the time we get there, will people buy them?
Project from the past
“One method for peering into the future is to project from the past,” said Mayberry, looking at the problem of the perspective of silicon-scaling trends. For the past 10 to 20 years, that has been all about the electrostatics – how well the gate can control the channel that lies underneath it. The loss of gate control over time is why people are either going to move to finFETs or very thin silicon-on-insulator devices in the next couple of generations.
“The ultimate scaling at least from the electrostatics point of view would be to make a very narrow diameter channel and then surround it with the gate. People have started to make implementations of that,” said Mayberry. The trend, assuming something else does not come along first to displace the conventional CMOS transistor, is to move to nanowire-based devices. But that’s only part of the story as simple scaling does not improve the performance of the device.
“The majority of performance gains are now coming from materials and materials engineering. What can we do to go further?” asked Mayberry.
One option is to combine the recently introduced trigate structure with high-mobility materials to improve speed for a given supply voltage. The trigate III-V devices work but “today, the planar device with better material trumps the structure”, said Mayberry. “But this is a moving curve. As people make progress these curves will move around.”
The trouble with III-V devices as a number of research teams have found so far is that the core transistor works well but the source and drain interfaces are not so good. High resistance slows them down. “Today, silicon CMOS still wins. But we expect to surpass this,” Mayberry claimed.
But is CMOS the right answer? “The trigate gained a decade in Ion/Ioff ratio. But when you look at the circuit, the device doesn’t switch fully: it’s just 1 to 10 per cent of the time under full software load. That goes down an order of magnitude in mobile. So the question is: can we continue to improve on/off ratio to reduce the static power consumption?”
Options for reducing off-state current are tunnel FETs and MEMS relays. “These devices have clear attractions. People are working on them. And they are likely to happen. But with these, people are still only looking for better versions of today’s technology. How can we do another projection of the future?
The influence of the present
“We can look at what we are working on today. We are working on incremental improvements in fabrication. Are there fundamental limits to devices? Yes there are. But our ability to build devices is limited by the fabrication technology. And, when you get to a physical limit, you find different ways to do things,” Mayberry argued. One big change that occurred with the introduction of high-k metal gates was the use of atomic layer deposition. “This is the kind of thing we need to advance fabrication technology and make some of these advanced devices. For example, the quantum-well FET [based on III-V materials] is made by building up a stack of materials in a very precise manner. In the tunnel FET, the layers have to be very precise to achieve the right bandgap structure.
“Beyond this, devices are all limited by interconnections. As you go to more vertical devices it becomes hard to make connections. It’s also a challenge for creating precise materials, especially as they aren’t always crystallized. It’s hard to predict precise properties. Scaling is not just a problem in the front-end. In interconnect layers, the proportion of the liner between the metal and dielectric is getting larger. You get more resistance because you have less space for copper. So, the resistance goes up dramatically as you get to smaller and smaller dimensions.”
As with high-k metal gates, material deposition can enable the trend to higher resistivity to be reversed. “A relatively small advance of engineering the grain structure leads to dramatic increase in the performance of the materials,” said Mayberry, who explained that further modifications to the process, introducing metals that exhibit properties such as specular boundary scattering can provide further performance boosts.
“It raises the quesiton: what could we do if we eliminate scattering? We could look at different materials, such as copper-gold, which forms an ordered structure,” said Mayberry putting up early results that show little change in interconnect resistance with wire diameter. “Tantalisingly, the points look more or less flat on this graph. We need to get more data to confirm but this looks like a material where you have engineered the amount of scattering. There is also a theory that if you have a layer on top you can modulate the amount of scattering. But there are other effects going on with this and it all needs more work. This is pointing out into the fog.”
Materials such as carbon nanotubes offer the prospect of ballistic interconnect. “This is deep into the fog. We don’t know how to fabricate this today. However, the ballistic interconect operates with the same performance as a signal repeater. It works very well as a long-distance interconnect. Unfortunately, we don’t know how to build this today.
“Overall, we are making small changes. But when we make them we keep going forward,” Mayberry said.
An educated guess
“The third way to predict the future is simply to guess. The third dimension opens up a lot of possibilities of where we might go from here. You can rethink interconnect. Today, we add more wires and more layers to increase density. this is a conventional way of looking at things. Let’s add not just more wires but devices to those layers,” said Mayberry, citing the example of a two-layer stacked latch that occupies 30 to 50 per cent less area than a planar layout on the same lithograpy rules. We are not far away from fabrication. Samsung and Leti have published work but, today, it involves manual design. We need tools. And until people know there is a benefit they won’t work on the tools.”
Another radical change is the switching device itself, involving various forms of spintronic or quantum device. Mayberry cited examples such as the graphene-based BISFET and other graphene devices, as well as the spinFET and the domain-wall transistor. “None of these are built on a single crystal. All in principle could be stacked up in layers,” he claimed.
The problem for the spin-based devices versus today’s charge-based transistors is how fast they can deliver information. “Ballistic spin transport is a lot slower than for charge. But for some distances, it will beat diffusion for electrons and phonons. We need to consider how to change our circuits to achieve the maximum potential of our devices.
“Let’s think about replacing CMOS rather than augmenting it. We are used to the style of computation called von Neumann. This process of loading data to process it and then store it again becomes a bottleneck when you have a transport limited device. It does not work well for spin-based devices. Alternatively, there is an architecture where you put a training set in place and then do matching. With this, the speed is not limited by transport but by training. You can use sometjing more like analog processing where you have an array of coupled oscillators, put a training set in place and have them fall into sync. This is the kind of thing that we are looking at in research today. We need to consdider not just how technolgy will evolve but consider how the computing will evolve.”
Who needs faster devices?
Mayberry questioned whether dramatic increases in computation are what the market wants: “People don’t process a lot of data. It’s more about collecting things such as music and video. Considering how people are using technology is very important part of how we plan for technology.”
Instead of using computers for concentrated periods of time at work, the trend, said Mayberry is toward ‘plastic’, opportunistic use. “The sessions are short. People are distracted. We need to look at how we can help them out. We can do things like faster resume. But that’s not enough.”
The systems need to look ahead more and use information from the environment. “If you are driving to a meeting, you don’t need an alarm to tell you to drive to the meeting. Whereas if you are planning a video game you want that alarm to be very loud. We need to do sensing of where the user is in the world. We need to go beyond just looking for better versions of what we have today.”