Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
July 30, 2013

Three Accellera proposals aim for better TLM

Three companies have donated technology to Accellera designed to improve TLM 2.0 modeling work, focusing on interrupts, register control and memory maps.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , , ,
July 15, 2013

Electrically aware Virtuoso aims to head off physical issues

Cadence Design Systems has rolled out a new version of Virtuoso that deals with the physical-implementation issues that arise in the sub-28nm nodes.
July 9, 2013

Xilinx tapes out for first of 20nm-generation FPGAs

Xilinx aims to be first of the FPGA makers to produce 20nm devices, expecting to move to production samples for some products by the end of the year.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , , , ,   |  Organizations:
June 19, 2013

nVidia to license GPU technology as IP cores

Graphics chipmaker nVidia has said it plans to license as IP cores some of its technology in the hope of building up a customer base among other chipmakers and systems houses developing their own SoCs.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , , ,   |  Organizations: ,
June 18, 2013

Microsemi focuses on security with Igloo2 FPGAs

Design security is a major target for Microsemi’s update to its Igloo series of flash memory-based FPGAs, which add an ARM-oriented memory subsystem.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , ,   |  Organizations:
June 17, 2013

Atmel bridges 8 and 32bit gap with ARM M0+ family

Atmel has launched its first family of microcontrollers based on ARM's Cortex M0+ with features to ease PCB design and provide programmable serial ports.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , ,   |  Organizations:
June 10, 2013

Altera outlines process roadmap for ‘Gen 10’ FPGAs

Altera has disclosed a number of the features that will make it into the top end of its upcoming 'Generation 10' family of FPGAs.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations: , ,
June 7, 2013

FinFET shift could drive analog automation as layout effects bite

The arrival of the finFET brings with it simulation and physical restrictions that might lead teams to resort to layout automation to get the job done.
June 4, 2013

Timing signoff: maybe it’s time to get rid of the clock

The effort needed in timing signoff could lead to a shift in design towards asynchronous techniques unless advanced OCV technologies improve.
June 3, 2013

UPF group moves to consider system-power issues

The group that developed the IEEE 1801 Unified Power Format standard is looking to bringing power modeling and estimation to the system level for version 3.0, due in 2015.