Agnisys automates register checks
Agnisys is adding automated verification of SoC register maps to its IDesignSpec tool for defining and specifying registers and their behaviours, deploying both a dynamic and a formal version.
Author Archives: Chris Edwards
Imagination to extend virtualization across the SoC
Imagination Technologies plans to introduce support for virtualization across all its processor cores, including signal processors such as the Ensigma family, as part of a plan to improve SoC security.
Unicef launches device contest for developing world
ARM and Unicef have teamed up to try to find new sources of designs for the developing world, and to stimulate innovation there.
Tortuga introduces security checks for SoC designs
Startup Tortuga Logic has developed a toolkit for checking the security aspects of SoC hardware designs.
Vehicle ethernet adds to IP virtual reference kits for board design
Automotive ethernet is the latest virtual reference design platform to be added to the family of models developed by Cadence to support its physical-layer IP cores.
Sonics readies fine-grained power-gating architecture
Sonics is moving into power management with an approach intended to substantially automate much of the job of building finely grained power-gated SoCs.
ARM calls for Internet Protocol to the edge in security play
ARM CTO Mike Muller called for IP to be used throughout the IoT as part of a strategy for secure systems at a recent NMI seminar at Bletchley Park, England.
Altera uses hierarchical approach to speed up FPGA compiles
Altera is revamping the Quartus II software for its FPGAs with a mapping and synthesis engine aimed at the upcoming Gen 10 products, as well as adding a C/C++ front-end for system-level design.
VLSI Symposia delve into future process choices
Intel 14nm finFET SoC process is among the highlights of the 2015 VLSI Symposia alongside research that looks at the integration of III-V and 2D materials for future processes.
EEMBC starts work on IoT-node power benchmark
Benchmarking organization EEMBC has kicked off an effort to develop a set of performance tests for edge nodes for the Internet of Things (IoT).