About Chris Edwards
Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
March 19, 2018
Accellera Systems Initiative has begun a project that may result in the creation of a standard to address security assurance for semiconductor IP cores.
February 28, 2018
Cadence and Imec have worked together on a project to tape out a test chip to explore manufacturing and design-rule options for the interconnect on future 3nm processes.
February 28, 2018
The Accellera Portable Stimulus Working Group has released for public review its current proposal for the verification standard it is working on.
February 25, 2018
June's DAC will see the culmination of a contest involving more than 100 teams vying to demonstrate the best use of machine learning on embedded hardware in a flying drone.
February 23, 2018
With the aim of making it easier for embedded devices to cooperate in an IoT environment, Mentor has launched a cloud connectivity and management framework.
February 22, 2018
Ceva has decided to include neural network, vector processing and customized instruction sets in an IP platform for 5G NR terminals.
February 21, 2018
Arm plans to use its cryptography cores and technology from its Simulity Labs acquisition to SIM-based security into IoT devices.
February 21, 2018
Semiwise, a startup founded by University of Glasgow professor Asen Asenov and former CEO of Gold Standard Simulations (GSS), has developed a low-power CMOS transistor technology suitable for ultralow-power sensor nodes.
February 15, 2018
Slovenian startup Red Pitaya has added a front-end module and firmware to its FPGA-based StemLab board to create a customizable vector network analyzer (VNA) and RF tester.
February 13, 2018
By the middle of this year Arm intends to deliver a processor designed specifically for deep-learning pipelines in edge devices, to capitalize on a move away from cloud computing for image and voice recognition.