Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
February 6, 2018

Machine learning and visualization ‘needed for coverage’

Traditional functional coverage has run out of steam and novel methods to improve the understanding of what tests are doing are needed to make progress. That is the view of Greg Smith, director of verification innovation and methodology improvement at Oracle.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
February 1, 2018

Metrics introduces elastic compute to handle peak-time verification

Metrics Technologies has launched as a supplier of cloud-based verification tools offering per-minute pricing.
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January 31, 2018

Analog blocks go digital for faster integration

Movellus has launched the first of a series of IP-creation tools with one that will build all-digital PLLs and integrate them into a design.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
January 28, 2018

UltraSoC delivers trace for RISC-V

UltraSoC has released its first implementation of processor trace for cores based on the RISC-V instruction set.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
January 23, 2018

Capacity shortages loom if 2017 growth repeats

If current market trends persist, shortages in wafers are likely to follow, hurting the ability of some companies to ship silicon and boost the prices for those who can.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , ,   |  Organizations: ,
January 23, 2018

Codasip updates processor-architecture tools

Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , ,   |  Organizations:
January 5, 2018

Ceva dedicates hardware to deep learning

Ceva has developed its first processor architecture aimed squarely at deep learning.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
January 2, 2018

Watch out for layout effects on finFET reliability

As geometries have shrunk, layout-dependent effects in CMOS have become ever more problematic. They are not just popping up in performance but reliability and aging effects as one IEDM presentation showed.
Article  |  Topics: Blog - EDA  |  Tags: , , ,
December 18, 2017

Third time lucky for iKettle security

IoT kettle maker changed its approach to bolster security, the company's CTO explained at the IoTSF conference in London.
Article  |  Topics: Blog - Embedded  |  Tags: ,
December 18, 2017

PCB tool rewrite to expand platform choices

Altium has rewritten its PCB-design software to improve graphics performance and provide the opportunity to port to non-Windows operating systems such as OS X.
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