Accellera begins IP security-assurance standards effort

By Chris Edwards |  No Comments  |  Posted: March 19, 2018
Topics/Categories: Blog - IP  |  Tags: ,  | Organizations:

Accellera Systems Initiative has begun a project that may result in the creation of a standard to address security assurance for semiconductor IP cores.

The IP Security Assurance proposed working group (PWG) process will start with a meeting in mid-April at Intel’s HQ in Santa Clara. Accellera is looking for participation from companies that are active in EDA, the design and verification of IP, or silicon integration. The aim of the PWG standard is to reduce the security risks from the integration of third-party IP.

One major risk stems from unknown behaviors that occur once integrated, which could result as an exploitable vulnerability. Accellera sees an assurance standard as a way of reducing the risk particularly in the common situation where third-party IP cores are treated as black boxes, which is often the case even where source code is available. The PWG will collect requirements, identify technical feasibility, identify industry interest and acceptance, and provide a recommendation to start or not start a working group.

Accellera chair Lu Dai said: “In the past, security threats were mainly a concern of only certain market segments, but in today’s environment this is no longer the case. The concern and possibility for threats has expanded substantially, and the PWG will help to determine the interest and commitment in the industry for standardization in this area.”

Martin Barnasconi, Accellera technical committee chair, added: “Currently there is no single standard to address security assurance in the development and delivery of IP to silicon integrators. We encourage everyone interested in creating an IP security assurance specification to participate in our initial PWG kickoff meeting next month.”

The first IP Security Assurance PWG meeting will be held Tuesday, April 17 from 10am – noon PT at Intel SC12, 3600 Juliette Lane, Santa Clara, CA 95054. Register for the meeting here. For more information about the PWG visit here. Companies that have already showed interest in participating in the kickoff meeting include: Cadence; Intel; Mentor, a Siemens business; Sonics ; Synopsys; and Qualcomm.

Comments are closed.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors