Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.
SoC developers who want to use USB Type-C in their designs will have to implement HDCP 2.2 content protection so that the target devices will be able to play protected content.
German consultancy E-Cooling describes its strategy for thermal and airflow analysis.
The increasing complexity of human-machine interfaces is challenging processor designers to produce the necessary performance within a limited power budget
Our new columnist introduces himself and traces the progress of formal verification over the last two decades. Join the discussion.
This second part looks at Mentor's views on flow neutrality, how DRS360 was born, machine learning and the threat from embedded Trojans.
The rising bandwidth demands of data centres have driven the development of 25G Ethernet, which will also form a pathway to 100G.
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
Unreachability analysis can help find design code that can never be executed, helping verification engineers refine their coverage goals.
Hierarchical DFT is vital for large, complex designs. Users still to transition to the technique can nevertheless exploit its pattern reuse strategies as they move toward adoption.
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