October 29, 2015
ARM has developed a version of its CoreLink on-chip interconnect IP intended to support systems based on its big.Little processors combinations that need a cache-coherent GPU connection with lower latency and higher peak throughput.
October 22, 2015
IP supplier CEVA has made a development platform intended to speed up the prototyping of IoT and similar devices based on its TeakLite-4 DSP core.
October 20, 2015
ARM has moved back into system-level modelling with the decision to buy the tools and models developed by Carbon Design Systems
October 19, 2015
Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
October 12, 2015
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
October 9, 2015
IMEC and Cadence have taped out a test chip intended to explore key lithography and metal-interconnect issues that will face users of the forthcoming 5nm process node.
October 8, 2015
Tech Design Forum talked to the general and program chairs of DVCon Europe about the conference and how it seeks to show the expansion of IC verification methodologies to the system level.
October 7, 2015
Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
October 6, 2015
Memory efficiency has driven the design of the latest video and image processor core developed by Cadence Tensilica.
October 6, 2015
Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
