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Cadence has launched an AI processor using an designed to take advantage of the sparse structure of typical deep neural networks.

IP supplier FotoNation has decided to embrace the use of high-level synthesis in the creation of cores for smartphones and other high-integration, low-power systems.

In a panel session at June's DAC, Synopsys customers talked about some of the ways they make verification more efficient and bring technologies such as formal, emulation, and simulation together.

After the moves by Cadence and Mentor, emulation in the cloud may only be the start of providing verification acceleration as a service.

Accellera has published the first release of the Portable Test and Stimulus Standard (PSS), with tools suppliers following up with software support.

IoT device makers should play more with their software and make use of techniques used in website design to increase overall usability, Amazon’s head of IoT analytics has claimed.

For nVidia chief scientist and Stanford professor Bill Dally, now is a great time to be involved in hardware design, thanks to the rise of AI.

Verification of the coming generation of highly autonomous vehicles needs says Peter Davies, director of security concepts at Thales.

DAC in June will feature a series of keynotes and technical sessions on machine learning and AI for both target applications and in the design process itself.

Xilinx plans to make reconfigurable computing the focus of its upcoming generation of FPGAs, which will be made on a 7nm finFET process at TSMC and expected to start sampling next year.