OpenAccess

February 8, 2019
Featured image - Layout merging feature

Fast, accurate layout merging for SoC flows

How to achieve efficient merging of data from formats such as OASIS, GDS, and OpenAccess to ensure timely verification through DRC runs.
Article  |  Topics: EDA - DFM, Verification  |  Tags: , , , , , ,   |  Organizations:
April 23, 2018
data validation featured image

The three critical data validation points in a design flow

Why design data integrity matters from cell design to tapeout. These techniques will help ensure your validation process is as comprehensive as possible.
Article  |  Topics: IP - Design Management, EDA - DFM, Verification  |  Tags: , , , , , , , ,   |  Organizations:
March 9, 2018
Saunder Peng is a Senior Application Engineer with Mentor, a Siemens Business. He received his B.S degree in Electrical Engineering from the University of California at Los Angeles, and his M.S. in Electrical Engineering from Columbia University, New York.

A better way to merge design files for physical verification

Still using custom layout or place and route tools here? Ditch that time-consuming practice for a real database merge flow.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors