DSP

Ceva's latest iteration of its XC architecture aims at the intensive DSP required for 5G basestations.

Ceva has decided to take its VLIW architecture into the world of IoT sensor nodes and smart wearables with the launch of the X1 processor core.

Ceva has launched the fifth generation of its vision-oriented DSP core family with an architecture tuned for the fast-growing area of convolutional neural networks and deep learning.

Cadence Design Systems has added floating-point to its latest core intended for embedded signal processing.

Cadence Design Systems has increased the throughput of its vision-oriented DSP family to cater for deep-learning applications.

ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.

UltraSoC is extending its debug support for a variety of processor cores through compatibility with ARM’s CoreSight debug system as well as support for Ceva’s DSP cores.

IP supplier CEVA has made a development platform intended to speed up the prototyping of IoT and similar devices based on its TeakLite-4 DSP core.

Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.

Foundry strikes two more Internet of Things subsystem deals for its 55nm ULP process based on Cadence Tensilica and Imagination MIPS/PowerVR cores.