Cadence adds floating point to Fusion

By Chris Edwards |  No Comments  |  Posted: July 26, 2016
Topics/Categories: Blog - Embedded, IP  |  Tags: , ,  | Organizations:

Cadence Design Systems has added floating-point to its latest core intended for signal-processing in automotive and other embedded systems to support faster development and automated code-generation tools.

Based on the LX7 VLIW core architecture used by predecessors, the Fusion G3 supports two double-precision operations per cycle or four at single precision.

“It’s always swings and roundabouts as to which way to go for designers between fixed and floating point,” said product marketing director Paul Garden. “But designers are pushing for more floating point because they don’t want a team of engineers having to convert from algorithms defined in floating point to fixed point.”

The floating-point instructions in the G3 are supported by an auto-vectorizing compiler. The G3 includes support for memory protection to avoid code in different regions from overwriting each other’s data as well as an optional scatter-gather DMA engine.

Garden said Cadence has maintained the same core architecture for the G3 – with the addition of the instructions and a lengthened pipeline to accommodate the more complex operations – to allow customers to use the same instruction-set architecture across multiple products. He argued that this has become increasingly important for semiconductor companies selling into the automotive space.

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