Toshiba case study describes advanced thermal simulation
Japanese giant uses variable thermal simulation on automotive IC intended for harsh environments.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
Advanced processes feature at VLSI in June
Among the papers at this year’s VLSI Symposia in Hawaii in June, Samsung will describe a 7nm CMOS process that uses EUV lithography to tighten up device features on minimum-pitch interconnects.
Racyics puts FD-SOI design flow online
Racyics has kicked off a hosted-design service to make it easier for startups and researchers to access the 22nm FD-SOI process offered by GlobalFoundries.
Embedded developers learn to become agile
Can embedded projects that call for both custom hardware and software be agile? It’s a question that a conference in early May organized by UK training company Feabhas sought to answer.
Imagination to slim down to graphics core
Hit by the loss of major client Apple, Imagination Technologies plans to sell off its MIPS and Ensigma divisions. The move signals a shift away from previous plans to diversify out from graphics processors.
Master the verification challenge of PCIe-based NVMe storage
NVMe is driving the SSD market thanks to its many useful features, but at least five major challenges must inform your verification plan.
Wally Rhines looks beyond ‘endless verification’ to the system era
DVCon China saw Mentor’s chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
Cadence tunes fixed-point DSP for neural networks
Cadence has stripped out some of the image-processing functions of the Vision P6 and boosted the number of execution units to build a DSP aimed at deep learning.
ARM deploys data-center tech to study verification patterns
ARM is using technologies such as Hadoop and Spark to provide insight into how well its verification processes are working.
Conference to look at agile development for embedded
A one-day conference on using agile development techniques for embedded systems takes place in the UK on 3 May.