Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
December 10, 2013

Graphene gets a reality check

A leading researcher argues that graphene will not replace but complement silicon and thrive in specialist applications.

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November 20, 2013

FinFETs’ III-V future promises sub-7nm, RF and opto CMOS

FinFETs for 7nm and below processes will be able to integrate high-mobility III-V materials despite being built on silicon processes, thanks to recent work by imec.

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November 20, 2013

Complexity to force shift to four-stage verification

The complexity of on-chip interconnect and the relentless growth in software size will drive the move to a four-stage verification process as well as the increased use of formal techniques to speed up SoC-level testing, Mentor Graphics verification specialist Mark Olen claimed at the Verification Futures conference.

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November 19, 2013

An easier start for UVM, take two

Training company Doulos is working on a second version of its Easier UVM guidelines intended to speed up the process of getting a UVM testbench underway for new users.

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November 18, 2013

MCU makers use middleware to entice developers

Microchip Technology has become the latest company to use easy access to middleware to encourage embedded-systems developers to move over to its platform.

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November 13, 2013

TSMC succession plan emphasizes stability

TSMC stays the course with new co-CEOs as Morris Chang retains executive leadership for now while finFET, 3D and other new technologies settle in.

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November 12, 2013

Cadence ties IR drop into static timing analysis

Cadence Design Systems uses parallelism in its Voltus tool to provide faster IR drop analysis and bridge static timing and IC-level power-integrity analysis.

November 7, 2013

TSMC demonstrates readiness for 3D-IC

Research projects to verify methodologies, address third-party integration challenges and add a low-cost interposer-like technology to the 3D-IC family make their mark.

November 6, 2013

Entrepreneurs get help for hardware

Highway1 has opened up Spring applications for its incubation service for hardware startups: trying to overcome the gap between prototype and product.

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November 5, 2013

Synopsys aims at fast real-time apps with ARC HS family

Synopsys has launched the ARC HS family of configurable-processor cores, using superpipelining to target high-performance embedded applications.

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