Accellera adds detail to proposed security assurance model
Accellera's security assurance working group has set out some of its plans in a white paper.
Author Archives: Chris Edwards
Ceva shares weights for lower DNN overhead
Ceva has employed a more extensive form of weight compression in its latest generation of DNN processor cores.
Cadence expands system analysis to thermal
Cadence has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies.
Embedded design meets low-code in Siemens integration plans
Siemens is combining recent acquisitions in novel ways, including one that will see a web-app development package interact more closely with Mentor's embedded offerings.
Digital twin points the way to system-level vehicle safety
The digital-twin concept provides several avenues to achieving better safety analysis and is likely to benefit from Siemens' integration of Mentor activities.
DVCon keynotes to look at edge computing and network evolution
DVCon Europe, Accellera’s design and verification conference to be held in Munich in late October, will feature keynotes on the trends toward edge computing and the future of networks.
Future memories not so future any more
Non-volatile alternatives to flash are finally moving out of the lab as Applied Materials launches production tools and Arm starts pushing MRAM.
IEDM homes in on connected devices
The IEDM has chosen a theme based around technologies for connected devices for its upcoming conference in December.
GlobalFoundries takes aim at TSMC’s customers in patent action
GlobalFoundries is calling for imports of chips fabbed by TSMC into the US and Germany in multiple actions based on a list of 16 patents.
Increased cooperation seen as vital for automotive safety verification
Safety verification calls for increased collaboration across the supply chain, experts say. The challenge is finding ways to make that happen.