Intel foundry to make Altera FPGAs
Intel's announcement that it will make FPGAs for Altera in an upcoming 14nm finFET process will reshape the programmable logic, and foundry, businesses.
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DVCon: UPF and CPF harmony in low power is only a foundation
As DVCon begins, we interview Cadence's Qi Wang, who has led its efforts to converge the Common Power Format with its rival as the IEEE1801 standard is revamped.
Parallel API for embedded systems goes public
The Multicore Association has published the MTAPI specification for a programming interface that aims to simplify the job of building applications that can not only use many cores running in parallel but schedule jobs dynamically depending on which types of core are available.
ISSCC 2013: AMD constraints help tame Jaguar
Some conservative decisions were important parts of AMD's design strategy for the 28nm core that's just been specified in PlayStation 4
ISSCC 2013: Silicon and organic stacks for prosthesis
TSVs and layers of organic electronics provide two ways to build medical sensors and prosthetics, as shown at ISSCC 2013.
ISSCC 2013: AMD on how to make a Star Trek holodeck… eventually
Keynoter Lisa Su spun a whimsical idea to serious intent as AMD looks to promote its model for heterogeneous architectures
ISSCC 2013: Energy harvesting needs to prioritize
ISSCC expert panel highlights lowering power over energy sources and identifies the need to focus on the product rather than the technology
Multicore-programming guide released
The Multicore Association has launched a guide to programming multicore systems in C and C++.
25 million gate prototyper arrives through collaboration
A team effort between three French companies has resulted in the launch of an FPGA prototyping system that is intended to provide emulation of designs with up to 25 million ASIC gates.
Cadence buys IP provider Cosmic
Cadence Design Systems is to buy Cosmic Circuits Private Limited, a developer of analog and mixed signal intellectual property (IP) cores.