EDA

Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.

Learn how XML-based constraints can standardize rule development and use with coding examples for the Calibre PERC reliability platform.

Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.

An IDE is critical to top quality refactoring. Here are some tips and examples of how to achieve that.

Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.

A look at the complexiites of implementing a Bluetooth Low Eenergy interface in an SoC.

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.

A look at the device types defined by the Compute Express Link (CXL) standard.

A look at the key protocols that control the Compute Express Link (CXL) standard for connecting CPUs and accelerators in hetereogenous computing environments.

A guide to the emerging Compute Express Link (CXL) standard, which links CPUs and accelerators in heterogenous computing environments.