CEA-Leti

September 19, 2019
Hossam Sarhan, Mentor, a Siemens business

Today’s analog/RF designs need interconnect inductance extraction

Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
Expert Insight  |  Topics: Electrical Design, EDA - IC Implementation  |  Tags: ,   |  Organizations: ,
September 13, 2019
John Blyler is a Consulting Editor of Tech Design Forum and the Editor-in-Chief of Interference Technology. He spent the first half of his career as a hardware-system systems engineer and program managerand the second half as a technology journalist, science writer and educator. John is an affiliate professor of systems engineering at Portland State University and lecturer for UC-Irvine’s online IoT program.

AI firsts (and more) at America’s SEMICON

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.

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