Samsung moves further into 3D for denser flash
Samsung described at VLSI Symposia how it has used two further forms of stacking to increase flash capacity.
VLSI 2021
Imec cuts transistor gap to less than 20nm with forksheets
Imec showed at VLSI Symposia a process flow that can cut the gap between complementary transistors to less than 20nm.
AI’s design speedups, with and without machine learning
At the VLSI Symposia, researchers described how AI hardware could help dramatically accelerate analog and digital design and not all of it directly through machine learning.
Alternative scaling approaches form VLSI 2021 technology highlights
The upcoming VLSI Symposia will feature a number of papers that show the ways in which novel approaches are going to be needed to continue scaling.