Tech Design Forum
Briefing
clock
clock
July 27, 2019
A repeatable methodology for modern reset domain crossing issues
Reset domain crossing is another area where rising SoC complexity and IP reuse is causing an increase in reliability and safety challenges.
Article | Topics:
Digital/analog implementation
,
Blog - EDA
,
IP
,
- Verification
| Tags:
asynchronous
,
clock
,
DO-254
,
IP reuse
,
ISO 26262
,
reset
,
reset domain crossing
,
safety
,
startup
,
verification plan
| Organizations:
DVCon
,
Siemens EDA
September 17, 2014
Web tool simplifies PCB-level clock-tree choices
Silicon Labs has developed a new type of parametric search tool that focuses on the selection of clock generators and jitter attenuators, making it easier to match them and downstream devices to the SoCs being designed into a PCB.
Article | Topics:
Blog - PCB
| Tags:
clock
,
internet infrastructure
,
telecom
,
web services
| Organizations:
Silicon Labs
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