Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
June 19, 2015

Tanner integration to assist Mentor in IoT and photonics

Following Mentor’s acquisition of Tanner EDA, management expect the integration will help with a drive into IoT applications and systems that need to go beyond standard IC lithography.

June 18, 2015

The road to 7nm sees patterning multiply

Is the industry ready to go beyond 10nm when it comes to lithography? Lithography researcher Professor David Pan sees design and process co-operation as the key approach.

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June 16, 2015

Collaboration let HiSilicon accelerate 16nm finFET plans

HiSilicon claims close collaboration with foundry and EDA tools partners helped speed up plans to tape out the first 16nm finFET-based design through TSMC.

June 11, 2015

Data mining tools trawl for IC icebergs

Dassault Systèmes and IC Manage have each developed “big data” mining software tools to track the progress of chip-design projects

June 11, 2015

Two-day app challenge results in RTL power analyzer

For DAC 2015, Invionics set itself the challenge of developing a custom tool in 48 hours based on votes for ideas provided by visitors to the show.

June 10, 2015

SoC verification ‘should use software more’

Verification of SoCs can’t be done by adapting IP-level strategies – it’ll take a much greater interaction with software, and the use of a shared language

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June 10, 2015

TSMC adds Cadence and Imagination subsystems for IoT

Foundry strikes two more Internet of Things subsystem deals for its 55nm ULP process based on Cadence Tensilica and Imagination MIPS/PowerVR cores.

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June 9, 2015

Debug life cycle expands with on-chip infrastructure

By widening the range of resources that can be tracked within an SoC, Ultrasoc says it has uncovered ways to make debug a long-term tool for complex multicore designs.

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June 9, 2015

Cloud EDA service gears up for commercial projects

Silicon Cloud is preparing to expand access to its network-based design environment beyond the universities using it today to commercial users

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June 9, 2015

COMPUTEX 2015: Wrap II – New customers

Electronics design needs to cope with a combination of major brands and tiny start-ups looking to exploit its skills even where their resources are thin.

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