Cadence boosts MAC count for neural networks
Cadence Design Systems has increased the throughput of its vision-oriented DSP family to cater for deep-learning applications.
Cadence Design Systems has increased the throughput of its vision-oriented DSP family to cater for deep-learning applications.
Validating test patterns is a notoriously tricky and laborious process. Mentor Graphics has some new ideas on that front.
Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
Do the synapses in the human brain offer a new model for the design flow in a Smart Everything world?
But project lead Chenming Hu, ‘finFET’s father’, has also highlighted important changes in the funding landscape for university research.
Cadence Design Systems has made additions to its Virtuoso mixed-signal design environment intended to improve design for manufacture and the ability of teams to create and test safety-critical systems.
HyperLynx from Mentor Graphics has moved into a new generation with more integrated features beyond PI and SI, and an easier to use GUI.
The EDA Consortium is rebranding and extending its activities to better reflect all the tools and services that now comprise IC design.
The 53rd Design Automation Conference has published its program for the upcoming event in Austin, Texas, which will include keynotes from AMD, nVidia, and NXP Semiconductors and tracks that connect electronics to biology.
Synopsys is updating its custom design tools to make working with finFET based processes easier.