MRAM pushes speed and endurance at IEDM
IEDM late last year showed how MRAM is being prepared for both FD-SOI and advanced finFET nodes.
IEDM late last year showed how MRAM is being prepared for both FD-SOI and advanced finFET nodes.
Partnership combines Siemens PAVE 360 digital twin with ARM IP, including dedicated automotive offerings, to speed and streamline design toward Level 5.
Case study describes how RF/AMS specialist used Calibre RealTime Digital within its flow for a high-end DSP SoC.
Imec, TNO, and Cartamundi have developed a low-cost way of letting tags communicate with embedded devices wirelessly by using a capacitive touchscreen.
A new CDC methodology uses automation and data hooks to improve a notoriously lengthy and tricky task – verifying synchronizers.
Tessent test suite targets automotive, AI and IoT projects that need embedded non-volatile memory.
This week’s RISC-V Summit in California has seen an expansion to the open-source portfolio being built around the architecture as well as increased support from software vendors such as Wind River.
App joins Portable Stimulus specialist’s Trek5 family to reduce manual test writing during verification on designs for the fast-growing RISC-V open-source processor.
Cadence Design Systems has agreed to buy the AWR RF-design company from its current owner National Instruments for approximately $160m.
Imagination Technologies has launched a new generation of GPU IP aimed at multitasking compute acceleration.