Blog Topics

May 23, 2012

TI tool hands out low-power tips

Texas Instruments has put together a tool aimed at users of its MSP430 microcontroller family that will help cut the power consumption of their applications.
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May 22, 2012

Making dummy fill smarter

Guest blogger Jeff Wilson discusses some of the subtleties involved in the effective use of dummy fill in deep sub-micron IC designs.
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May 16, 2012

Cadence joins the dots for verification

The EDA giant has accelerated and integrated its tool suites and broadened its verification IP catalog in its new look System Development Suite.
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May 3, 2012

Technical Newsletter #4: Verification, Emulation, Prototyping

This newsletter highlights recently-added content on the site that addresses the connected areas of verification, prototyping and emulation. We’ve also added more overview EDA Guides on major design flow challenges.
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April 30, 2012

New England User2User puts emphasis on board-level design and verification

Mentor Graphics' user event includes insights on constraints-driven design and the emerging OVM verification methodology in an eye-catching program.
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April 25, 2012

No more spaghetti

Cutting the cabling to simplify the emulation process.
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April 17, 2012

SpringSoft tackles analog automation with new twist on constraints

SpringSoft is trying a different approach to constraint-based design in a bid to improve the automation of custom and mixed-signal design, particularly on advanced process nodes.
April 13, 2012

U2U notebook: five sources of EDA growth… and golf clubs

Mentor Graphics' CEO Wally Rhines picked out the trends he says can boost design productivity and drive growth for tools vendors at the company's Silicon Valley User2User conference
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April 5, 2012

U2U links test and yield enhancement

Subtle data correlation and analysis techniques are helping to relate logic failures to particular types of manufacturing defect.
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April 5, 2012

U2U to assess state of 3DIC flow

Qualcomm's director of engineering is among the panelists at the upcoming U2U event in Santa Clara who will look at the state of play for 3DICs and how design flows are bearing up to dealing with 3D integration.
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