August 23, 2012
The verification challenge is best addressed by a combination of highly targeted tools, according to Pranav Ashar, CTO of Real Intent.
August 16, 2012
Anyone still tempted to regard PCB design as electronics’ sleepy backwater, obviously hasn’t been taking notice of trends not just in shrinking form factors but also I/O and memory standards. Proliferation not just in standards but in speeds have been creating whole new sets of challenges ranging from power and signal integrity right through to […]
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August 16, 2012
It’s not that long since ARM was, to be blunt, rather fussy about the companies to which it licensed its technology – and at what level. Today, ‘ARM in a box’ comes in a number of flavors. Somewhat appropriately, the company linked with Cadence Design Systems and TSMC at the former’s recent CDNLive user conference […]
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August 6, 2012
The president and co-CEO of Synopsys provides his take on the mounting influence of software and physical effects in the creation of SoCs.
July 26, 2012
Xilinx says it has made the first public release of its Vivado Design Suite – the reworked design environment for its sub-40mn programmable-logic devices that is based more heavily on concepts from the custom-IC world than its existing ISE toolset.
July 3, 2012
Characterizing standard-cell defect mechanisms helps improve IC testing
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June 13, 2012
MEMS relay-based devices offer the ultimate in subthreshold leakage: they don't have any. Design and technology advances are promising to overcome problems with reliability, design and speed, according to Tsu-Jae King Liu of UC Berkeley.
June 12, 2012
During his CEDA talk at DAC last week Professor Mark Horowitz challenged the audience to find holes in the approach he and his team have been developing over the past few years to rethink analog design.
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June 11, 2012
FinFET or trigate structure provide a number of degrees of freedom in design in the battle against DIBL – and one of those dimensions is doping, Professor Tsu-Jae King Liu explained in a course ahead of the 2012 VLSI Symposia this week.
June 11, 2012
Cognovo is running a webinar next week (19 June) on model-driven design for software-defined wireless modems.