Visual timing tool focuses on high-speed PCB signals
Cadence Design Systems has developed a visual timing analyzer for Allegro that tunes signals used by high-speed protocols such as DDR4, PCI Express, and SATA.
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Synopsys targets 5X performance gain with integrated verification suite
New tool technologies, Verdi integration and greater flow concurrency also contribute to a claimed 3X increase in productivity for Verification Compiler.
LDRA introduces tool to steer users through ISO26262 process
LDRA has developed software to support an ISO26262 process for the growing band of automotive suppliers that have to claim compliance with the standard.
The high-power, low-energy option for TD-LTE
Turning transmit power up may save energy on TD-LTE, according to envelope-tracking specialist Nujira.
Freescale tweaks Cortex-M0+ MCU to squeeze die size down
Freescale Semiconductor has tuned the design of the KL02 microcontroller to produce a new design that is close to 20 per smaller.
Filesystem streamlines flash usage for smart meters
HCC Embedded has developed a specialised filesystem for smart meters designed to reduce power consumption and increase flash memory lifetime.
Silicon Labs brings 8 and 32bit MCUs into toolchain
Silicon Labs has brought development support for both its 8bit and ongoing 32bit microcontroller lines together using its Simplicity Studio IDE.
Real Intent state machine debug focuses on core errors
Real Intent' Ascent IIV tool adds analysis functions to pinpoint fundamental errors in finite state machines and support for SystemVerilog 2009.
IoT calls for security rethink, says Green Hills CTO
The rise of the Internet of Things will drive a change in attitude to security, Green Hills CTO David Kleidermacher claimed in his Embedded World keynote.
Cadence uses SQL to boost verification manager capacity
Cadence Design Systems has launched Incisive vManager, a verification management tool that uses a database backend to manage coverage on large SoC projects.
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