Archives

April 24, 2013

The BeagleBone Black is uncorked

Half the price, a 1GHz processor, 2GB of integrated storage and some 'interesting' plug-in capes. All for $45. Let the wild Linux-Making begin.
Article  |  Topics: Blog Topics, Commentary, Blog - Embedded, PCB  |  Tags: , ,   |  Organizations:
April 23, 2013

AMD targets software scalability with embedded x86

AMD has stepped back into the market for embedded processors with a quad core design derived from its desktop APUs, which combine a general-purpose x86 subsystem with a GPU.
Article  |  Topics: Blog - Embedded  |  Tags: , , ,   |  Organizations:
April 18, 2013

Accellera publishes tag standard for soft IP

Accellera Systems Initiative has published version of 1.0 of its Soft IP Tagging standard for adding licensing information to RTL and other design files.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
April 18, 2013

ARM intros single-use licence for Big-Little

ARM has decided to put together a package deal for some of the components that will let prospective customers implement a multiprocessor subsystem in a single SoC design
Article  |  Topics: Blog - EDA, IP  |  Tags: ,   |  Organizations:
April 10, 2013

FinFET father headlines Mentor’s west coast user conference

Dr Chenming Hu joins Mentor CEO Wally Rhines and Xilinx SVP Victor Peng to keynote free day-long User2User in San Jose on April 25th, capping a full technical program.
Article  |  Topics: Conferences, Blog - EDA, Embedded, PCB  |  Tags:   |  Organizations: , ,
April 10, 2013

H.265 begins to flavor the video codec soup

Two vendors have announced early adopter software implementations of the new video compression standard that promises an up to 50% bandwidth cut against H.264.
Article  |  Topics: Blog - Embedded, IP, - Standards  |  Tags: , , ,   |  Organizations: , ,
April 10, 2013

ProPlus enters simulation with turbo-charged parallel SPICE

The device modeling specialist has integrated its new NanoSpice simulator with existing capture and analysis tools in a broad design-for-yield package.
Article  |  Topics: Blog Topics, Design to Silicon, Verification  |  Tags: , , , , ,   |  Organizations:
April 4, 2013

Accellera extends verification work to legacy environments

Accellera Systems Initiative has created a working group to look at one of the knottiest problems in IC design: to simplify the job of checking designs when the bits come from so many sources and use languages that were not built for interoperability.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
March 27, 2013

Are you in the BeagleBone queue yet?

With an April release date promised, we should soon have confirmation on the new processor and price tag for the stripped down embedded Linux development board.
Article  |  Topics: Blog Topics, Blog - Embedded  |  Tags: ,   |  Organizations:
March 22, 2013

DATE: Silicon Europe plans to build cluster of clusters

Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,