August 8, 2023
We have the technology. Learn how to 'shift left' with Calibre DesignEnhancer and meet IR, EM and PPA objectives.
January 13, 2022
More optimistic about the semiconductor industries prospects than for some time, Siemens Joe Sawicki identified key EDA challenges at DAC.
August 19, 2019
Refactoring saves time and resuources by converting code to a common format and eliminates redundancies to make it more readable and maintainable.
April 2, 2019
How Chips&Media used HLS on the development of a computer vision IP block.
March 26, 2019
The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
March 15, 2019
Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
October 3, 2018
Exchange frameworks are emerging to make it easier for neural-network developers to swap between development environments.
September 8, 2017
High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
May 8, 2017
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
March 15, 2017
DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).