How Chips&Media used HLS on the development of a computer vision IP block.
The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
Exchange frameworks are emerging to make it easier for neural-network developers to swap between development environments.
High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
By taking a pragmatic approach, the two technology giants have comfortably adopted high-level synthesis and verification - and have shared their experiences.
In both data centers and automobiles deep learning is taking hold. But it is a technique that challenges conventional microprocessors, leading system designers to look at alternative architectures for acceleration.
2016 marks the 20th anniversary of the term Electronic System Level (ESL), introduced by Gary Smith in 1996. Where are we now? And how will developments this year push the frontiers of practical ESL design?
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