ESL

September 1, 2008

Benchmarking the network-on-chip

From its inception, the OCP standard was designed to address the advent of heterogeneous processors and multicore SoC development. Since the OCP-IP organization opened for business in December 2001, it has established eight technical working groups (WGs) to develop tools, technologies and products that support the standard, leading in turn to the release of a […]

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June 1, 2008

Intel takes a new path from A to D

Justin Rattner will this year mark 35 years with Intel. His career with the technology giant has seen him collect numerous accolades, particularly for work in areas such as high performance computing (HPC). He was Intel’s first principal engineer and was its fourth member of staff to be named a fellow (he is today a […]

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June 1, 2008

Making the move to ESL hardware design

Electronic system level (ESL) is typically defined as design above the register transfer level (RTL). When applied to hardware design, ESL is the process of describing hardware functionality at higher levels of abstraction to increase designer productivity and enable greater degrees of exploration. With ESL, hardware designers no longer spend most of their time designing […]

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June 1, 2008

Systems design automation for real

The Design Automation and Test in Europe (DATE) conference is a comparatively young event—it reached only its 11th edition this March. Nevertheless, it has now firmly established itself on the EDA calendar and this year significantly extended its scope to become the world’s most important electronic systems design automation conference. At the same time, it […]

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March 1, 2008

ESL at the inflection point

Electronic system level (ESL) design is moving to a new stage in its development, advancing from a proof-of-concept environment to one that is seeing its adoption and deployment at the forefront of design. The article terms this shift ‘ESL 2.0’. The reason for this goes beyond mere marketing hype. Inherent in the transition defined above […]

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March 1, 2008

To pause and take stock

The headline number in the Consumer Electronics Association’s (CEA) latest market forecast contained a few devils in the detail, although the sector does seem poised to defy more pessimistic views of the economy’s prospects. The projection of 6.1% growth for 2008 is robust, giving just over $171bn in US factory door sales (Figure 1).Meanwhile, GDP […]

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March 1, 2008

A question of freedom

Although no EDA company counts among its membership (for good practical reasons), it is fair to describe the US Consumer Electronics Association (CEA) as one of technology’s most broadly representative trade bodies. From retailers and brand holders to the hardware and software companies that directly supply components for CE products, the CEA has a position […]

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March 1, 2008

The European view

This year’s general chair of Design Automation and Test in Europe is Donatella Sciuto, a full professor at the Politecnico d iMilano in Milan, Italy. She received her Laurea in Electronic Engineering from the Politecnico di Milano in 1984 and her PhD in Electrical and Computer Engineering in 1988 from the University of Colorado, Boulder. […]

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December 1, 2007

Mastering the memory maze

Since the early 1980s,most of the semiconductor business has been enthralled by the microprocessor, the PC and commodity DRAMs. For all the talk of potential ‘better markets’ and ‘more profitable businesses to be in’, PCs and their brethren came to represent 35- 40% of the industry’s output. They constituted the prime platform for not only […]

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December 1, 2007

Using a ‘divide and conquer’ approach to system verification

Today’s increasingly complex designs typically need to undergo verification at three different levels: block, interconnect and system. There are now well-established strategies for addressing the first two, but the system level, while in many ways the ultimate test, remains the weakest link in the verification process. System verification normally begins only after a prototype board […]

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