Design kit for 10nm FD-SOI due out next year
Research group CEA-Leti expects to have design kits ready for a 10nm FD-SOI process in June 2014
CEA-Leti
Intel and ST stake claims to foundry low power designs
With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.
DATE: Silicon Europe plans to build cluster of clusters
Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.
FD-SOI costs to match bulk by year end, says ST
STMicroelectronics pushes on with FDSOI despite dissolution of ST-Ericcson joint venture that provided the lead customer for the process.
FD-SOI vs finFETs mulled during IEDM
Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs
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