DAC 2013 will aim to reflect not just tool development and use but also the business and training issues that run alongside them. The DAC program will once more include a Management Day (Tuesday, June 4) , addressing higher level design strategy, but also now adds a Training Day (Thursday, June 6), offering a series of market and technology specific courses.
Both new strands are reviewed below, but note that while the Management Day continues to be included with your main conference registration, you must register separately for any of the training courses.
Management Day at DAC 2013
The DAC Management Day has traditionally explored the points at which business and technology decisions meet. This year, there are two sessions, one each in the morning and afternoon of Tuesday, June 4. They explore best practices in deciding design trade-offs and the most productive strategies when moving from one node to another.
Trade-offs and choices for emerging SoCs
10:30am-12:00pm, Room 17AB
The first session will address not just the core optimization process for designs, but how to make the right decisions based on both your target volumes and the geographically-distributed nature of the team and supply chain involved. Andrew Chang, corporate VP with Taiwan’s MediaTek, and Ron Martino, VP for automotive R&D at Freescale Semiconductor will join Pike Powers, a partner with Fulbright & Jaworski to discuss their own experiences, and lessons learned in achieving the right balance.
Decision making for complex ICs
2:00pm-4:30pm, Room 17AB
Adopting a new node or process technology can have a domino effect. Flows, methodologies and suppliers may all need to be changed. If that doesn’t happen efficiently, projects can miss deadlines, the bug-count can multiply and the resulting performance may be less than had been expected. The goal of this session is to arm managers with a number of decision criteria that will allow them to make the best choices across a project. The speakers are Rex Berridge, microprocessor design & automation manager at IBM, Kee Sup Kim, VP, design technology at Samsung Electronics, Bob Madge, director, design-enabled manufacturing at GlobalFoundries, and J.C. Parker, Engineering Director, Design Tools & Methodology, at LSI.
Training Day at DAC 2013
For the first time, DAC 2013 is offering a series of four training courses organized in association with Doulos. They will address different aspects of SystemVerilog, SystemC and ARM-based design within the company’s accredited program.
There’s a good variation of levels in terms of what’s on offer, from introductions right through to much deeper dives. The courses also reflect DAC’s greater emphasis on embedded design as well as the broader demands of ESL and verification.
Click on the links for any of the sessions below to learn more.
Track 1: SystemVerilog Design
Thursday, June 6, 9:00AM-5:30PM, Room 4ABC
Part 1: Synthesis-friendly SystemVerilog (9:00AM-12.30PM)
Part 2: A hardware designer’s guide to SystemVerilog verification (2:00PM-5:30PM)
Track 2: SystemVerilog Verification
Thursday, June 6, 9:00AM-5:30PM, Room 8ABC
Part 1: Hardcore SystemVerilog for class-based verification (9:00AM-12:30PM)
Part 2: Getting started with the Universal Verification Methodology (2:00PM-5:30PM)
Track 3: ARM Accredited Engineer program
Thursday, June 6, 9:00AM-5.30PM, Room 6B
Part 1: A kick start to the ARM Cortex processor family (9:00AM-12:30PM)
Part 2: Software development for the ARM Cortex process family (2:00PM-5:30PM)
Track 4: ESL and SystemC
Thursday, June 6 9:00AM-5:30PM, Room 18D
Part 1: The definitive guide to SystemC (9:00AM-12:30PM)
Part 2: TLM 2.0 and the IEEE 1666-2011 standard (2:00PM-5:30PM)
Remember to add any Training Course options to your registration.
Meanwhile, you can check out our other DAC previews on these links: