Harness manufacturing for systems of systems
An eight-part battleplan can help automate one of tougher electrical design challenges.
Tech Design Forum Briefing
Briefing Authors
Paul Dempsey
Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
Luke Collins
Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.
Chris Edwards
Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
SPIE Advanced Lithography preview: Mentor Graphics
The major West Coast technical conference for lithography is just two weeks away and offers a packed agenda.
Penetration test tools extend reach into embedded devices
The Metasploit collection of tools used by penetration testers to find security flaws in software now has a bridge to deeply embedded hardware devices, developed by analytics company Rapid7.
Five steps to faster FPGA implementation
Five steps you can take to speed up the FPGA implementation of a complex design, from structuring your design flow to debugging its output.
Overcome IoT edge challenges with integrated flows
IoT edge designs are being undertaken by multi-disciplinary teams that must work within the tightest of budgets.
EU group claims it’s “time to reinvent computing”
A report put together by the European Union’s Hipeac embedded architecture research network claims the challenges of highly interconnected embedded systems will call for what amounts to the reinvention of computing.
Wafer expansion hits the buffers
What’s old is new: 200mm wafers are returning and driving shortages while 450mm fades into the distance.
DesignCon 2017 preview: Mentor Graphics
DesignCon 2017 takes place from Jan 31 to Feb 2 at the Santa Clara Convention Center with its usual focus on PCB design and implementation.
Virtual prototyping case study focuses on address mapping, clocking and QoS in DDR memory interface optimisation
Case study applies virtual prototyping to optimise address mapping, clock frequency, and Quality of Service configurations to meet DDR performance goals.
VLSI Symposia issue calls for papers
Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits.