Early detection using design integrity checks during implementation from abstract LEF/DEF inputs can deliver major efficiencies.
ESD has always been a major issue but with increasing densities and growing die sizes it is becoming a higher order concern. Automation and vizualization can help manage the task.
The RF and AMS specialist turned to design software that allowed it to run design checks during place and route.
How the use of declarative, constraint-based descriptions can help you focus command sequences on areas of interest.
How can we refine our approach functional verification to deal with the increasing number of systems that leverage artificial intelligence.
P2P (point-to-point) resistance is fundamental to IC reliability verification. Handle it more efficiently with detailed, automated path layout analysis.
A new clock-domain crossing methodology is described and results provided to show how automation delivers greater efficiency.
Master the three prerequisites of format translation and chose the right one from the various translation strategies.
How an integrated design environment can help you overcome complexities within the Universal Verification Methodology and manage the size of the libraries within it.
How Siemens PAVE 360 platform leverages emulation to deliver the exhaustive test required for the incoming generation of autonomous vehicles.
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