clock domain crossing (CDC)

April 21, 2020
reset domain crossing featured image

How to achieve accurate reset domain crossing verification

The authors describe an emerging methodology based on a hierarchical data model approach that satisfies the key requirements for RDC verification.
January 30, 2020
clock-domain crossing featim Jan20

Get CDC protocols right with an automated formal-to-simulation flow

A new clock-domain crossing methodology is described and results provided to show how automation delivers greater efficiency.
Article  |  Topics: EDA Topics, EDA - Verification  |  Tags: , , ,   |  Organizations:
January 7, 2019
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: Introducing the ADEPT FV flow

Escape formal's narrower definitions with a flow that shows you how to Avoid, Detect, Erase, Prove Absence and Tape Out while avoiding bugs.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , , , ,   |  Organizations:
May 31, 2015

Technology trends demand netlist-level CDC verification

Complex processes and aggressive synthesis interventions are increasing the risks of metastability, creating a need for netlist-level CDC verification
May 11, 2015

Verifying clock domain crossings when using fast-to-slow clocks

A look at three techniques to verify the validity of signals moving between clock domains
December 8, 2014

Overcoming complex CDC violations with a concurrent block and SoC-level verification flow

CDC violations are now so complex that it takes a combined block and full SoC level verification strategy to catch and fix all the bugs
Article  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
December 1, 2014

Using formal techniques to help tackle SoC verification challenges

Formal techniques can be applied to various parts of the verification challenge, including low-power and clock domain-crossing issues
July 20, 2014
Rebecca Lipon is the senior product marketing manager for the functional verification product line at Synopsys. Prior to joining the marketing team, Rebecca was an applications engineer at Synopsys working on UVM/VMM adoption, VCS, VIP, static and formal verification deployments.

Rethinking SoC verification

The argument for an integrated approach to SoC verification
July 3, 2014
Pranav Ashar

It’s time to embrace objective-driven verification

How Wall Street's vastly resourced IT teams already point the way to cheaper, faster and more efficient verification by putting goals not tools first.
May 28, 2014

Formal verification

As designs get larger and stress the ability of simulation to exercise an SoC, formal techniques have become essential parts of design and verification.

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