July 20, 2015
In sessions at the 2015 Design Automation Conference, engineers who had worked on finFET-oriented projects revealed how the technology has changed their design practices and where others may want to think twice about making the move.
July 10, 2015
What hardware designers can learn from software verification techniques such as agile, behaviour-driven development, code coverage and zero known defect strategies
June 30, 2015
Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan
June 25, 2015
How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft
June 22, 2015
Verifying MIPI interfaces including CSI-2, CPHY, DPHY, MPY, Unipro and the UFS host controller on complex SoCs - should you make or buy the necessary VIP?
June 17, 2015
Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more
May 31, 2015
Complex processes and aggressive synthesis interventions are increasing the risks of metastability, creating a need for netlist-level CDC verification
May 30, 2015
Clock-tree generation is coming under increased scrutiny because of its role in dynamic power consumption and problems caused by on-chip PVT variation.
May 29, 2015
Research study suggests the maturity of your verification flow determines the likelihood of first-pass success far more than the complexity inherent in design size.
May 28, 2015
FinFETs present a number of problems with respect to dynamic power consumption. Design techniques are being re-evaluated to deal with the issue.
