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May 31, 2015
Technology trends demand netlist-level CDC verification
Complex processes and aggressive synthesis interventions are increasing the risks of metastability, creating a need for netlist-level CDC verification
Article | Topics:
EDA - Verification
| Tags:
clock domain crossing (CDC)
,
clock gating
,
metastability
,
MTBF
,
power optimization
,
test synthesis
,
timing optimization
| Organizations:
Real Intent
EDA Topics
DFM
DFT
ESL
IC Implementation
Verification
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