Managing code coverage to achieve verification closure in low-power SoCs
A look at some of the key techniques needed to ensue good code coverage during the verification of low-power SoC designs.
code coverage
Reachable or reached, covered or coverable – is it just semantics?
How code coverage and reachability analysis differ between simulation and formal verification techniques, and ways to use that to advantage.
What hardware verification can learn from software development
What hardware designers can learn from software verification techniques such as agile, behaviour-driven development, code coverage and zero known defect strategies
Smaller designs face greater risk of respins
Research study suggests the maturity of your verification flow determines the likelihood of first-pass success far more than the complexity inherent in design size.
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