Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
September 25, 2015

DVCon Europe initial technical program unveiled

DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.

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September 22, 2015

IP and software portfolio introduced to speed IoT development

Low-power IP and software portfolio includes security hardware, Bluetooth and ISB interfaces, configurable processors and sensor subsystems

September 16, 2015

Synopsys extends FPGA-based prototyping to 1.6bn ASIC gates

Synopsys updates its FPGA-based prototyping system to offer more capacity, higher speed, faster bring-up, better ROI

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September 14, 2015

Menta aims for TSMC 28nm with embedded FPGA cores

Menta has launched a family of off-the-shelf IP cores aimed at TSMC’s 28nm processes to provide reconfigurability for SoCs.

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September 10, 2015

Debug monitors look for deadlock

UltraSoC has added deadlock detection capabilities to its multicore onchip debug framework.

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September 2, 2015

Early registration opens for DVCon Europe 2015

Early registration has opened for the DVCon Europe conference to be held in Munich, Germany in November.

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August 6, 2015

Flow exploration key to finFET network processor implementation

Flow exploration helps designers establish best approach to advanced network processor implementation on Samsung finFET process

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July 30, 2015

10nm flow reveals complexity of finFET design process

Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.

July 28, 2015

Samsung applies early prediction and color management to 10nm plans

Rapid virtual prototyping and a metal stack that’s more designer friendly are two of the ways in which Samsung aims to build up foundry market share for its 14nm and 10nm finFET processes.

July 28, 2015

USB Type-C IP to ease end users’ frustration

Synopsys delivers reconfigured PHY IP to support reversible USB Type-C connector.

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