HAPS


September 16, 2015

Synopsys extends FPGA-based prototyping to 1.6bn ASIC gates

Synopsys updates its FPGA-based prototyping system to offer more capacity, higher speed, faster bring-up, better ROI
Article  |  Topics: Blog - IP, - Verification  |  Tags: , , , ,   |  Organizations:
October 28, 2014

10Gbit/s USB 3.1 IP and verification support on the way

USB 3.1 IP, verification IP, virtual development kit build on Synopsys' USB 3.0 DesignWare and supporting ecosystem
Article  |  Topics: Blog - IP, - Verification  |  Tags: , , , ,

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