About Chris Edwards
Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
April 21, 2015
Cadence Design Systems has added five products to its OrCAD line of PCB-design tools that cover manufacturability, signal integrity and management, and introduced three feature updates.
April 20, 2015
The Athena Group says it has developed countermeasures against side-channel attacks for its IP that offer the best protection currently available.
March 26, 2015
Xmos has launched a series of microcontrollers based on its timesliced multicore architecture that adds Gigabit Ethernet interfaces.
March 24, 2015
The 2015 Design Automation Conference in San Francisco will feature keynotes that focus on body-worn electronics such as Google’s Smart Contact Lens and automotive issues.
March 24, 2015
Texas Instruments has launched a family of ARM-based microcontrollers intended to act as a migration path from its low-energy 16bit MSP430 series, developing its own flash-capable 90nm process to implement them.
March 18, 2015
ARM and Cadence have signed a deal that provides the IP teams at both companies with access to each other's cores.
March 12, 2015
CEA-Leti has launched a design center called Silicon Impulse with the intention of lowering the entry barrier to using the FD-SOI process.
March 11, 2015
The FD-SOI technology developed by CEA-Leti and STMicroelectronics is beginning to gain ground as chipmakers investigate the process as a way to deliver low-energy, wireless-capable SoCs.
March 11, 2015
As plans crystallize to take FD-SOI down to 10nm, CEA-Leti argues that the technology can provide an alternative path to that of finFETs to get to 7nm processes and beyond.
March 10, 2015
Cadence Design Systems has coupled the parallel-processing techniques behind its recently launched sign-off tools to engines intended to deal with sub-28nm process issues in a suite that reworks the company’s key implementation tools.