TI uses Cortex-M4F to provide low-power 32bit upgrade for MSP430

By Chris Edwards |  No Comments  |  Posted: March 24, 2015
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Texas Instruments has launched a family of ARM-based microcontrollers intended to act as a migration path from its low-energy 16bit MSP430 series, developing its own flash-capable 90nm process to implement them.

Although based on a radically different processor architecture to the MSP430, TI wants to make the most of brand image the 16bit parts have acquired in the low-power space by calling the new family MSP432. Although programs written in assembly will demand significant rework to run on the Cortex M4F used by the MSP32 parts, the company claims to have minimized the effort required for C programs written for the MSP432, providing a high degree of compatibility through similarly structured header files.

Roger Neumair, system architect for ultralow-power microcontrollers at TI, who has used the MSP430 in his own hobbyist projects, such as a home weather station claimed it took about 10 minutes to convert one of his own projects, which was written in C, to the new architecture.

Neumair said the peripherals on the 32bit devices are designed to match closely those of the MSP430, although the company has chosen to add a 14bit, 1Msample/s analog-to-digital converter. A device-driver library that follows the format of the one provided for the MSP430 has been included on-chip ROM.

Drivers in place

Jennifer Barry, microcontroller product marketing manager for TI, said: “We asked whether our customers are really using the driver library. We found just over half are using it on the MSP430 so we said let’s go ahead and put it into ROM.”

Although a Cortex M0+-based SAML21 Microcontroller from Atmel has claimed a higher overall number, TI said it has a achieved the highest score on EEMBC’s ULPBench energy-focused benchmark for a device based on the floating-point capable M4F core, reaching 167 versus the Atmel score of almost 186.

The ULPBench score exceeds that of the MSP430 parts tested, largely because the M4F is better suited to the 32bit arithmetic routines used by the EEMBC benchmark, Neumair said. TI claims a current consumption of 94µA/MHz and 850nA in deep sleep mode with an active real-time clock – the state used for the ULPBench tests.

“We used a lot of optimization in the transistors when developing the process to achieve those numbers,” Neumair said.

Although yet to ship silicon, Ambiq Micro has claimed it can reach down to 30µA/MHz, with a target of 24MHz maximum versus TI’s 48MHz, and 100nA in deep sleep using near-threshold logic circuits.

Threshold choices

“We have built an MSP430 using subthreshold circuits,” Neumair said, but added variability introduces significant problems for production. “With subthreshold or near-threshold designs, the parameters of the transistors you can’t control so easily. We got an MSP430 running in our research with MIT but we looked at it and stepped back.”

Barry added system considerations made subthreshold logic less attractive overall. “We found that with customers, in their systems they had to put in other components that needed the voltage to be boosted, so it just became not successful.”

The MSP432 has its own onchip DC/DC converter, although it can be used with an external LDO regulator, and supports a wide voltage range from 1.62 to 3.7V. It cannot be hooked up directly to a rechargeable battery as it would not survive the high voltage required for charging. Neumair said the addition of interface transistors with the required isolation would raise overall power consumption.

The first device has 256Kbyte of onchip flash, separated into pages that can be read or programmed simultaneously. Barry said the aim is to introduce devices with up to 2Mbyte on onchip flash within a year. The 90nm process is not compatible with the company’s ferroelectric memory.

“We will continue to invest heavily in our FRAM for our 16bit MCUs. The TAM [total available market] for the 16bit MCU space is not shrinking, it’s growing,” Barry claimed.

The flash memory borrows a protection mechanism from the Wolverine microcontroller family that allows the flash to be put into execute-only mode so that it cannot be read out after programming, in addition to a protection fuse on the JTAG port and an onchip AES encryption engine.

Barry said the MSP432 is the first architecture in TI’s portfolio to use a cloud-based version of the company’s CCS compiler. It does not have all the features of the locally installed version but allows rapid prototyping without the need to install the suite on a workstation, Neumair said.

TI will fab the MSP432 devices itself although it has foundry-qualified the process to provide the potential for a backup source.

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